Highly integrated memory and logic circuits as well as circuits for data transmission at high speed are based on MOS-transistors which are produced by means of a CMOS or BiCMOS-technology.
Advances in the direction of a further increase in integration density of circuits require the implementation of devices of extremely small dimensions in respect of electronically active regions and extremely shallow transitions in the electronic band structure. For the coming years the ‘International Technology Roadmap for Semiconductors’, Semiconductor Industries Association, 1999, requires a reduction in the lateral structures of integrated circuits of below 70 nanometres (nm) and a reduction in the effective gate oxide thickness of MOS-transistors of below 1 nanometre. At the present time however no satisfactory solutions with which those technological demands can be fulfilled are known in the area of conventional silicon technology.
The implementation of structures of reduced dimensions is not possible with the material SiO2 (silicon oxide, silicon dioxide) used hitherto as the gate oxide, as high tunnel currents occur with the required gate oxide thicknesses of below between 1 and 2 nm. High tunnel currents result in poor power data in respect of finished circuits. Inter alia they reduce the gain factors which can be achieved, increase the power loss and involve a high level of noise. The search is therefore on for alternative gate oxide materials with a high dielectric constant. Besides materials such as aluminum oxide, zirconium oxide and hafnium oxide, praseodymium oxide is also being tried (H-J Osten et al, Technical Digest IEDM 2000, page 653).
Gate structures for MOS-transistors of memory and logic circuits which are being produced nowadays or which are under development involve a layer structure. The thin gate oxide layer directly adjoins the Si-substrate. A gate electrode generally consisting of polycrystalline silicon (polysilicon, poly-Si) is deposited on the gate oxide layer. A contact region is additionally provided between the gate electrode and conductor tracks which are generally made from aluminum. The contact region includes one or more silicides of refractive metals such as for example tungsten (W), molybdenum (Mo), tantalum (Ta) or titanium (Ti) or suicides of transition metals such as cobalt (Co), platinum (Pt); nickel (Ni) etc. Typical gate contact structures which are used nowadays have a layer sequence WSix/poly-Si/SiO2, CoSix/poly-Si/SiO2 or TiSix/poly-Si/SiO2, in the direction from the contact region to the gate oxide.
The contact regions provide for low-resistance contacting of source and drain areas in MOS-transistors and a reduction in the bulk resistance of gate electrodes and conductor tracks of polysilicon. They serve at the same time as a diffusion barrier for preventing damaging alloy formation between the semiconducting material (for example silicon) and the metallically conductive material of the conductor tracks.
Suicides of Ti, Co, Pt or Ni are preferably also used in contact regions in relation to monocrystalline silicon, for example the source and drain regions of an MOS-transistor or the base, emitter or collector region of a bipolar transistor, see J A Kittl et al ‘Salicides and Alternative Technologies for Future ICs’, Solid State Technology, June 1999, 81 ff and Solid State Technology, August 1999, 55 ff.
In known production methods for highly integrated circuits, to produce self-adjusting contact regions, firstly the metal is deposited in surface-covering relationship on the surface of the doped and prestructured substrate. During a subsequent tempering step the formation of a highly conductive metal silicide takes place exclusively in areas in which, prior to the metal deposition, the silicon substrate was exposed and was not covered with oxide, at the contact locations between the metal and silicon. In the case of an MOS-transistor, contact regions at source, drain and gate are produced in that way.
A disadvantage of that method is that then the metal has to be removed in expensive etching and cleaning steps, in the areas in which no silicide was formed.